Methods and apparatuses consistent with exemplary embodiments of the inventive concept relate to an integrated circuit, and more particularly, to an integrated circuit for calculating a target entry address of one of a plurality of entries of a buffer descriptor based on a data block offset.
A flash memory device performs a program operation and a read operation in units of a predetermined size, e.g., in units of blocks. A buffer descriptor is used to map addresses necessary for data input/output of a plurality of memory devices. A controller that controls the data input/output of the memory devices maps necessary addresses using buffer descriptors and accesses an area of a memory device corresponding to an address obtained as the mapping result.